• Desco
  • EMIT
  • ESD Systems.com
  • Menda Pump
  • Menda-ID
  • Protektive Pak
  • SCS
  • Smart Clock
  • Special Team
  • Statguard Flooring

ESD Superstore – Online Leader for ESD Solutions
000 Checkout

Added to your cart

You do not have any items in your shopping cart at this time.
View All cart items

  Shop from our other Desco
  Industries websites:

Desco Europe


Questions And Answers

# List All Questions Search List by Category
Question Under MIL. STD.883e 3015.7 Is there any ‘implied’ allowance to condition pins during HBM ESD zap based on ‘unique’ analog circuit functionality? Intuitively it doesn’t make sense, but there may be a practical side...any thoughts or experience? Anonymous, South Portland, Maine
Answer I asked a colleague, Mike Hopkins from KeyTek, and his reply is no, there are no conditioning requirements for devices under the HBM testing found in either ESD Association or JEDEC standards. There is, however, a conditioning requirement in the JEDEC standard 78 for conditioning devices for Latch-up Testing.
Related Categories:
If you have found this Q/A useful, please rate it based on its helpfulness.
Rating Rating Rating Rating Rating
This question has been rated: 0%0%
(0% at 0 Ratings)